1. FIELD OF THE INVENTION
The invention relates to a semiconductor wafer processing apparatus for carrying out a variety of processing such as etching and film-depositing to a semiconductor wafer, and more particularly to a semiconductor wafer processing apparatus for successively carrying out processing such as etching and film-depositing to a plurality of semiconductor wafers. The invention also relates to a method of successively processing a plurality of semiconductor wafers.
2. DESCRIPTION OF THE PRIOR ART.
With higher integration in a semiconductor device, there has been rapidly developed techniques for higher densification by making patterns as small as possible. For instance, it is now necessary to process a pattern at half-micron level for large-volume production. Such a development in techniques for higher densification demands an etching step, which is one of steps for forming fine patterns, to be carried out with higher accuracy and also with higher throughput.
As one of apparatuses for carrying out etching is known a dry etching apparatus. In general, a dry etching apparatus includes two circular-plate shaped electrodes disposed in parallel with each other in a vacuum chamber with reactive gas being filled between the electrodes. One of electrodes is electrically connected to a high frequency power source through a blocking Capacitor, and the other is grounded. There is produced plasma between the electrodes by applying high frequency voltage to the electrode. A surface of the electrode to which high frequency power is applied is negatively biased. Positively charged ions in plasma are accelerated by the voltage, and hence are made to radiate perpendicularly to a semiconductor wafer. Thus, a semiconductor wafer is anisotropically etched by the thus made ion bombardment.
A conventional dry etching apparatus as mentioned above is a batch type for processing a plurality of wafers at a time. Though a batch type apparatus has a great processing rate, it is difficult for a batch type apparatus to uniformly, accurately process a plurality of wafers placed in a chamber. On the other hand, there has been proposed an apparatus wherein every single semiconductor wafer is placed and processed in a small chamber in order to carry out more uniform processing. However, this type of apparatus is inferior to the above mentioned batch type in a processing rate.
There is known a multi-chamber type semiconductor wafer processing apparatus for carrying out a plurality of processes more rapidly. FIG. 1 is a cross-sectional view illustrating one of such semiconductor wafer processing apparatuses. As illustrated in FIG. 1, the multi-chamber type apparatus basically includes a wafer transfer chamber 35, three process chambers 33 each of which is connected to the wafer transfer chamber 35 through a gate valve 34, and two wafer load chambers 40 each of which is connected to the wafer transfer chamber 35 through a gate valve 37.
In the wafer transfer chamber 35 is defined a load rock chamber 36 through which the wafer transfer chamber 35 is connected to the wafer load chambers 40. In the wafer transfer chamber 35 are provided a wafer transfer arm 38a in the vicinity of the process chambers 33 and a wafer transfer arm 38b in the load rock chamber 40. In each of the wafer load chambers 40 is placed a wafer cassette 39 containing a plurality of wafers 32 therein. The wafer transfer arm 38b is designed to take a semiconductor wafer 32 out of the wafer cassette 39 one by one and deliver it to the wafer transfer arm 38a, and receive a processed semiconductor wafer from the wafer transfer arm 38a and transfer it into the wafer cassette 39. The wafer transfer arm 38a is designed to receive a semiconductor wafer 32 from the wafer transfer arm 38b and transfer it into one of the process chambers 33, and take out a semiconductor wafer 32 having been processed in the process chamber 33.
In the above described conventional multi-chamber type semiconductor wafer processing apparatus, wafers are transferred between the wafer transfer chamber 35 and the process chambers 33 by a pair of the wafer transfer arms 35a and 35b. Accordingly, even if semiconductor wafer processing is completed in a certain process chamber, the processed semiconductor wafer has to wait to be taken out of the process chamber while the wafer transfer arms 35a and 35b transfer another wafer. As a result, even if a plurality of process chambers are to be used, it is difficult to sufficiently increase a throughput.